The Importance of Signal Integrity

All electronic products use electrical signals to carry information.

At one extreme information may be relatively simple and change slowly with time, while at the other extreme, information may be complex and change rapidly with time.

If the signal integrity in a system is degraded, vital information may be lost, resulting in system malfunction, the consequences of which may be serious.

Signals may be classified as analogue or digital, both are used extensively in many products.

The use of digital signals has developed rapidly in the least few decades, but the real world is fundamentally analogue.

Methods of converting analogue signals to digital, and vice versa, are available.

Technological developments and market trends are pushing electronic systems to ever increasing complexity and operating speeds which places ever increasing demands on signal integrity.

Computer systems and digital devices are using clock frequencies of several GHz which poses severe design problems.

While loss of signal integrity in a telephone system may only cause annoyance it could have very serious repercussions in medical equipment used in an operation.

Signal integrity problems should be identified in the design phase of a product and design techniques and procedures for overcoming them should be identified.

Figure 1 Signals we are all Familiar with

Figure 1 Signals we are all Familiar with Direct communication between two people, is a familiar example of how signals convey information.

In the case of two humans speaking to one another, the information transferred from one person to another is carried by a sound wave.

For example, the speaker says a phrase by causing her vocal chords to vibrate in just the right way so that the information contained in the phrase is impressed on the surrounding air by causing slight variations in pressure.

These variations then travel at the speed of sound to the listener where they cause his ear drums to vibrate, which in turn causes electrical signals to be generated in his nervous system which are then passed to his brain, which then processes the information so he can hear and hopefully understand the phrase.

Note that this seemingly simple situation is complex- humans are able to communicate extremely complex ideas using speech.

Speech waveforms are complex and both the sender and the receiver of the waveforms must be capable of producing and processing them to extract the information they contain.

In addition, the medium through which the waves travel must be capable of transmitting the waveforms, which we shall refer to as signals, without distorting them too much, otherwise some of the information will be lost.

Note that in Fig 1, noise is shown to be interfering with the sound wave, which will present the listener with some difficulty- if the noise is too loud he will not be able to receive the information correctly.

Direct verbal communication is only possible over relatively short distances, because as the sound wave travels through the air the pressure variations get smaller and eventually they are "lost" in noise, or the "hearing system" of the listener is not sensitive enough to receive and process the reduced changes in pressure.

The integrity of the signal that conveys the information is degraded and if the degradation is severe much of the information will be lost.

Analysing the situation we have just considered, we may conclude:-

  • Signals are used to convey, or carry information

  • When the information to be conveyed is complex the signals that carry it are also complex

  • Many modern systems and products are complex

  • In any system, and in particular complex systems, signal integrity must be high enough to ensure information is not degraded or even lost

  • Each time a signal passes through a "part" of the system, it is likely that its integrity will be degraded

  • All "parts" of the system may degrade signal integrity, which includes all the media the signals travel through, such as the atmosphere and interconnection wires, PCB tracks etc.

  • Interference, or noise, will degrade signals and may cause loss of information and even system malfunction.

Figure 2 The Signal Integrity Map

Figure 2 The Signal Integrity Map

The centre of the map is classified as the technologically comfortable zone: in this zone signal integrity problems are minimal.

As we move away from the comfortable zone we start to encounter signal integrity problems.

For example, if we move towards the mobile devices zone signal amplitude drops and signal frequency increases posing problems of bandwidth and signal/noise ratio. If we move towards the computer zone signal frequency increases, posing bandwidth problems.

Only representative product areas are shown on the signal integrity map and the zones are meant to be indicative only.

For example, when we move towards the computer zone and clock frequency increase and amplitude actually falls.

There is an important principle that can be inferred from the map:

if you are designing products in a technologically difficult zone, process your signals so that they move to the technologically comfortable zone as soon as possible.

High speed digital signal integrity is of interest as more devices are developed using high speed digital techniques.

 

Figure 3 Ideal Noise Immunity for an Inverter

Figure 3 Ideal Noise Immunity for an Inverter

Gate G1 is a simple NAND gate operating as an inverter.

The output of the gate VOUT is the inverse of the input VIN

 

 

The gate threshold voltage VT is 1/2 the supply voltage VDD e.g. if VDD= 3V, VT= 1.5V.

The gate treats any signal voltage lower than VT as a logic LO; any signal voltage higher than VT is treated as a logic HI.

The signal is somewhat idealised- 3V represents logic HI, 0V represents logic LO. The input signal swings between 0 and 3V.

The idealised noise immunity is VT, that is 1.5V

When the gate input is 0V a noise voltage of 1.4V will be ignored by the gate, its output will not change.

When the gate input is 3V a noise voltage of -1.4V superimposed VDD, on will be ignored by the gate, its output will not change.

Note that 3V -1.4V= 1.6V, which is greater than 1.5V, the gate threshold voltage.

Figure 4 A Realistic Digital Signal showing Levels of Noise Immunity

Figure 4 A Realistic Digital Signal showing Levels of Noise Immunity

The diagram shows a more realistic digital signal.

The gate has two gate threshold voltages, VTH and VTL

In the case shown the signal overshoots the supply voltage VDD for a short time and then drops below it .

When the signal switches to the LO state, it fails to reach 0V and it oscillates for a short time.

Signals must not settle to a steady value inside the VTH and VTL band. If they do circuit product behavior will be erratic.

Some products will treat the signal as a logic HI, whilst some products of the same type will treat the signal as a logic LO: some products will fail to work properly.

For logic LO signals to be valid they must settle between 0V and VTL.

The noise immunity is:

$\begin{align} & {{V}_{NIH}}={{V}_{INH(\min )}}-{{V}_{TH}} \\ & {{V}_{NIL}}={{V}_{TL}}-{{V}_{INL(\max )}} \\ \end{align}$

The noise immunity has 2 values, one for the logic HI state of the signal, the other for the signal logic LO state.

Which ever value is the smallest is the noise immunity of the circuit.

The gate threshold voltage is subject by manufacturing and environmental tolerances.

For CMOS technologies: ${{V}_{T}}=\frac{{{V}_{DD}}}{2}\pm 0.3{{V}_{DD}}$

 

$\begin{align} & \text{If VDD=3V, }{{V}_{DD}}/2=1.5V\text{ and }0.3{{V}_{DD}}=0.9V \\ & {{V}_{TH}}=1.5+0.9=2.4V\text{ and }{{V}_{TL}}=\text{ }1.5-0.9V=0.6V \\ \end{align}$

 

Figure 5 Real High Speed Digital Signals

Figure 5 Real High Speed Digital Signals

The diagram shows high speed digital signals on multiple PCB traces.

 

The blips on the waveforms are noise.

 

They are mainly caused by reflections of signals on PCB traces.

 

Note the blips on the logic LO values.

 

The large divisions on the time scale represent 10ns- each small division represents 1ns.

 

High speed digital systems use clock signals of 1GHz and higher.

 

The periodic time of a 1GHz clock is 1ns

 

 

The rise and fall times of a 1GHz clock signal will be about 50ps.

Systems and products designed using high speed digital signals must be designed for signal integrity.